ＰＷＭの反転出力がほしいなと思って調べてみたらCCLが使えることがわかったのでライブラリを作成してみた。
前から気にはなっていたもののなんだか面倒臭そうだったので今まで見て見ぬふりをしていたがこの機能は便利に使えそうだ。
下記は、16MHzクロックでTCA0-WO0出力(黄色)をCCLで反転出力(水色)してみた結果。
【FILTSEL_DISABLE】
遅延は10ns未満。
【FILTSEL_SYNCH】
遅延は120ns程度。
【FILTSEL_FILTER】
遅延は250ns程度。
【サンプル】
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 |
#include "avr8_ccl.h" int main(void) { /* CCL 初期化 */ Ccl::begin(); Ccl::insel0(Ccl::LUT0, Ccl::INSEL0_TCA0); /* TCA-WO0 */ Ccl::truth(Ccl::LUT0, Ccl::LOP_NOT, 1); /* 1=INSEL0を反転 */ Ccl::output(Ccl::LUT0, true); Ccl::enable(Ccl::LUT0, true); /* TCA0 初期化 */ ... while (1) yield(); } |
【ライブラリ】
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 |
/* avr8_ccl.h - Configurable Custom Logic Driver for Microchip AVR8 Series Copyright (c) 2026 Sasapea's Lab. All right reserved. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see <https://www.gnu.org/licenses/>. */ #pragma once #include "avr8_config.h" #if defined(__AVR_2__) #define CCL_CLKSRC_OSCHF_gc CCL_CLKSRC_OSC20M_gc #define CCL_CLKSRC_OSC32K_gc CCL_CLKSRC_OSCULP32K_gc #define CCL_CLKSRC_OSC1K_gc CCL_CLKSRC_OSCULP1K_gc #endif #if defined(__AVR_0__) || defined(__AVR_1__) #define CCL_INSEL0_EVENTA_gc CCL_INSEL0_EVENT0_gc #define CCL_INSEL0_EVENTB_gc CCL_INSEL0_EVENT1_gc #define CCL_INSEL1_EVENTA_gc CCL_INSEL1_EVENT0_gc #define CCL_INSEL1_EVENTB_gc CCL_INSEL1_EVENT1_gc #define CCL_INSEL2_EVENTA_gc CCL_INSEL2_EVENT0_gc #define CCL_INSEL2_EVENTB_gc CCL_INSEL2_EVENT1_gc #endif #if defined(__AVR_0__) || defined(__AVR_1__) || defined(__AVR_2__) || defined(__AVR_EA__) #define CCL_INSEL0_IN0_gc CCL_INSEL0_IO_gc #define CCL_INSEL1_IN1_gc CCL_INSEL0_IO_gc #define CCL_INSEL2_IN2_gc CCL_INSEL0_IO_gc #endif class Ccl { public: /* LUT ID */ typedef enum { LUT0, LUT1, #if defined(CCL_TRUTH3) LUT2, LUT3, #endif #if defined(CCL_TRUTH5) LUT4, LUT5, #endif } LUT; /* Logical Operation */ typedef enum { LOP_AND, LOP_NAND, LOP_OR, LOP_NOR, LOP_XOR, LOP_XNOR, LOP_NOT, } LOP; /* SEQ ID */ typedef enum { SEQ0, /* This bit group selects the sequencer configuration for LUT0 and LUT1. */ #if defined(CCL_SEQCTRL1) SEQ1, /* This bit group selects the sequencer configuration for LUT2 and LUT3. */ #endif #if defined(CCL_SEQCTRL2) SEQ2, /* This bit group selects the sequencer configuration for LUT4 and LUT5. */ #endif } SEQ; #if !defined(__AVR_0__) && !defined(__AVR_1__) /* Clock Source Selection */ typedef enum { CLKSRC_CLKPER = CCL_CLKSRC_CLKPER_gc, /* Peripheral Clock */ CLKSRC_IN2 = CCL_CLKSRC_IN2_gc, /* Selection by INSEL2 */ CLKSRC_OSCHF = CCL_CLKSRC_OSCHF_gc, /* Internal high-frequency oscillator */ CLKSRC_OSC32K = CCL_CLKSRC_OSC32K_gc, /* 32.768 kHz oscillator */ CLKSRC_OSC1K = CCL_CLKSRC_OSC1K_gc, /* 32.768 kHz oscillator divided by 32 */ #if defined(__AVR_EB__) CLKSRC_PLL = CCL_CLKSRC_PLL_gc /* 32.768 kHz oscillator divided by 32 */ #endif } CLKSRC; #endif /* Edge Detection Enable select */ typedef enum { EDGEDET_DISABLE = CCL_EDGEDET_DIS_gc, /* Edge detector is disabled */ EDGEDET_ENABLE = CCL_EDGEDET_EN_gc /* Edge detector is enabled */ } EDGEDET; /* Filter Selection */ typedef enum { FILTSEL_DISABLE = CCL_FILTSEL_DISABLE_gc, /* Filter disabled */ FILTSEL_SYNCH = CCL_FILTSEL_SYNCH_gc, /* Synchronizer enabled */ FILTSEL_FILTER = CCL_FILTSEL_FILTER_gc /* Filter enabled */ } FILTSEL; /* LUT Input 0 Source Selection */ typedef enum { INSEL0_MASK = CCL_INSEL0_MASK_gc, /* Masked input */ INSEL0_FEEDBACK = CCL_INSEL0_FEEDBACK_gc, /* Feedback input source */ INSEL0_LINK = CCL_INSEL0_LINK_gc, /* Linked LUT input source */ INSEL0_EVENTA = CCL_INSEL0_EVENTA_gc, /* Event input source A */ INSEL0_EVENTB = CCL_INSEL0_EVENTB_gc, /* Event input source B */ INSEL0_IN0 = CCL_INSEL0_IN0_gc, /* IO pin LUTn-IN0 input source */ INSEL0_AC0 = CCL_INSEL0_AC0_gc, /* AC0 OUT input source */ #if defined(ZCD0) INSEL0_ZCD0 = CCL_INSEL0_ZCD0_gc, /* ZCD0 OUT input source */ #endif INSEL0_USART0 = CCL_INSEL0_USART0_gc, /* USART0 TXD input source */ INSEL0_SPI0 = CCL_INSEL0_SPI0_gc, /* SPI0 MOSI input source */ #if defined(TCA0) INSEL0_TCA0 = CCL_INSEL0_TCA0_gc, /* TCA0 WO0 input source */ #endif #if defined(TCA1) INSEL0_TCA1 = CCL_INSEL0_TCA1_gc, /* TCA1 WO0 input source */ #endif INSEL0_TCB0 = CCL_INSEL0_TCB0_gc, /* TCB0 WO input source */ #if defined(TCD0) INSEL0_TCD0 = CCL_INSEL0_TCD0_gc, /* TCD0 WOA input source */ #endif #if defined(TCE0) INSEL0_TCE0 = CCL_INSEL0_TCE0_gc, /* TCE0 WO0 input source */ #endif #if defined(TCF0) INSEL0_TCF0 = CCL_INSEL0_TCF0_gc, /* TCF0 WO0 input source */ #endif #if defined(WEX0) INSEL0_WEX0 = CCL_INSEL0_WEX0_gc /* Blanking input source */ #endif } INSEL0; /* LUT Input 1 Source Selection */ typedef enum { INSEL1_MASK = CCL_INSEL1_MASK_gc, /* Masked input */ INSEL1_FEEDBACK = CCL_INSEL1_FEEDBACK_gc, /* Feedback input source */ INSEL1_LINK = CCL_INSEL1_LINK_gc, /* Linked LUT input source */ INSEL1_EVENTA = CCL_INSEL1_EVENTA_gc, /* Event input source A */ INSEL1_EVENTB = CCL_INSEL1_EVENTB_gc, /* Event input source B */ INSEL1_IN1 = CCL_INSEL1_IN1_gc, /* IO pin LUTn-IN1 input source */ #if defined(AC1) INSEL1_AC1 = CCL_INSEL1_AC1_gc, /* AC1 OUT input source */ #endif #if defined(ZCD1) INSEL1_ZCD1 = CCL_INSEL1_ZCD1_gc, /* ZCD1 OUT input source */ #endif #if defined(USART1) INSEL1_USART1 = CCL_INSEL1_USART1_gc, /* USART1 TXD input source */ #endif INSEL1_SPI0 = CCL_INSEL1_SPI0_gc, /* SPI0 MOSI input source */ #if defined(TCA0) INSEL1_TCA0 = CCL_INSEL1_TCA0_gc, /* TCA0 WO1 input source */ #endif #if defined(TCA1) INSEL1_TCA1 = CCL_INSEL1_TCA1_gc, /* TCA1 WO1 input source */ #endif #if defined(TCB1) INSEL1_TCB1 = CCL_INSEL1_TCB1_gc, /* TCB1 WO input source */ #endif #if defined(TCD0) INSEL1_TCD0 = CCL_INSEL1_TCD0_gc /* TCD0 WOB input source */ #endif #if defined(TCE0) INSEL1_TCE0 = CCL_INSEL1_TCE0_gc, /* TCE0 WO1 input source */ #endif #if defined(TCF0) INSEL1_TCF0 = CCL_INSEL1_TCF0_gc, /* TCF0 WO1 input source */ #endif #if defined(WEX0) INSEL1_WEX0 = CCL_INSEL1_WEX0_gc /* Blanking input source */ #endif } INSEL1; /* LUT Input 2 Source Selection */ typedef enum { INSEL2_MASK = CCL_INSEL2_MASK_gc, /* Masked input */ INSEL2_FEEDBACK = CCL_INSEL2_FEEDBACK_gc, /* Feedback input source */ INSEL2_LINK = CCL_INSEL2_LINK_gc, /* Linked LUT input source */ INSEL2_EVENTA = CCL_INSEL2_EVENTA_gc, /* Event input source A */ INSEL2_EVENTB = CCL_INSEL2_EVENTB_gc, /* Event input source B */ INSEL2_IN2 = CCL_INSEL2_IN2_gc, /* IO pin LUTn-IN2 input source */ #if defined(AC2) INSEL2_AC2 = CCL_INSEL2_AC2_gc, /* AC2 OUT input source */ #endif #if defined(USART2) INSEL2_USART2 = CCL_INSEL2_USART2_gc, /* USART2 TXD input source */ #endif INSEL2_SPI0 = CCL_INSEL2_SPI0_gc, /* SPI0 SCK input source */ #if defined(TCA0) INSEL2_TCA0 = CCL_INSEL2_TCA0_gc, /* TCA0 WO2 input source */ #endif #if defined(TCA1) INSEL2_TCA1 = CCL_INSEL2_TCA1_gc, /* TCA1 WO2 input source */ #endif #if defined(__AVR_EB__) INSEL2_TCB1 = CCL_INSEL2_TCB1_gc, /* TCB1 WO input source */ #endif #if defined(TCB2) INSEL2_TCB2 = CCL_INSEL2_TCB2_gc, /* TCB2 WO input source */ #endif #if defined(TCD0) INSEL2_TCD0 = CCL_INSEL2_TCD0_gc /* TCD0 WOC input source */ #endif #if defined(TCE0) INSEL2_TCE0 = CCL_INSEL2_TCE0_gc, /* TCE0 WO2 input source */ #endif #if defined(TCF0) INSEL2_TCF0 = CCL_INSEL2_TCF0_gc, /* TCF0 WO0 input source */ #endif #if defined(WEX0) INSEL2_WEX0 = CCL_INSEL2_WEX0_gc /* Blanking input source */ #endif } INSEL2; #if defined(CCL_INTMODE0_gm) /* Interrupt Mode for LUTn select */ typedef enum { INTMODE_DISABLE = CCL_INTMODE0_INTDISABLE_gc, /* Interrupt disabled */ INTMODE_RISING = CCL_INTMODE0_RISING_gc, /* Sense rising edge */ INTMODE_FALLING = CCL_INTMODE0_FALLING_gc, /* Sense falling edge */ INTMODE_BOTH = CCL_INTMODE0_BOTH_gc /* Sense both edges */ } INTMODE; #endif /* Sequential Selection */ typedef enum { SEQSEL_DISABLE = CCL_SEQSEL_DISABLE_gc, /* Sequential logic disabled */ SEQSEL_DFF = CCL_SEQSEL_DFF_gc, /* D FlipFlop */ SEQSEL_JK = CCL_SEQSEL_JK_gc, /* JK FlipFlop */ SEQSEL_LATCH = CCL_SEQSEL_LATCH_gc, /* D Latch */ SEQSEL_RS = CCL_SEQSEL_RS_gc /* RS Latch */ } SEQSEL; Ccl(void) { } /* virtual */ ~Ccl(void) { } static void begin(void) { CCL.SEQCTRL0 = 0; #if defined(CCL_TRUTH3) CCL.SEQCTRL1 = 0; #endif #if defined(CCL_TRUTH5) CCL.SEQCTRL2 = 0; #endif #if defined(CCL_INTCTRL0) CCL.INTCTRL0 = 0; #endif #if defined(CCL_INTCTRL1) CCL.INTCTRL1 = 0; #endif CCL.LUT0CTRLA = 0; CCL.LUT0CTRLB = 0; CCL.LUT0CTRLC = 0; CCL.TRUTH0 = 0; CCL.LUT1CTRLA = 0; CCL.LUT1CTRLB = 0; CCL.LUT1CTRLC = 0; CCL.TRUTH1 = 0; #if defined(CCL_TRUTH3) CCL.LUT2CTRLA = 0; CCL.LUT2CTRLB = 0; CCL.LUT2CTRLC = 0; CCL.TRUTH2 = 0; CCL.LUT3CTRLA = 0; CCL.LUT3CTRLB = 0; CCL.LUT3CTRLC = 0; CCL.TRUTH3 = 0; #endif #if defined(CCL_TRUTH5) CCL.LUT4CTRLA = 0; CCL.LUT4CTRLB = 0; CCL.LUT4CTRLC = 0; CCL.TRUTH4 = 0; CCL.LUT5CTRLA = 0; CCL.LUT5CTRLB = 0; CCL.LUT5CTRLC = 0; CCL.TRUTH5 = 0; #endif CCL.CTRLA = CCL_ENABLE_bm; } static void end(void) { CCL.CTRLA = 0; } static void runstdby(bool enable = true) { CCL.CTRLA = (CCL.CTRLA & ~CCL_RUNSTDBY_bm) | enable; } static void output(LUT lut, bool enable = true) { switch (lut) { case LUT0: CCL.LUT0CTRLA = (CCL.LUT0CTRLA & ~CCL_OUTEN_bm) | (enable ? CCL_OUTEN_bm : 0); break; case LUT1: CCL.LUT1CTRLA = (CCL.LUT1CTRLA & ~CCL_OUTEN_bm) | (enable ? CCL_OUTEN_bm : 0); break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLA = (CCL.LUT2CTRLA & ~CCL_OUTEN_bm) | (enable ? CCL_OUTEN_bm : 0); break; case LUT3: CCL.LUT3CTRLA = (CCL.LUT3CTRLA & ~CCL_OUTEN_bm) | (enable ? CCL_OUTEN_bm : 0); break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLA = (CCL.LUT4CTRLA & ~CCL_OUTEN_bm) | (enable ? CCL_OUTEN_bm : 0); break; case LUT5: CCL.LUT5CTRLA = (CCL.LUT5CTRLA & ~CCL_OUTEN_bm) | (enable ? CCL_OUTEN_bm : 0); break; #endif } } static void enable(LUT lut, bool enable = true) { switch (lut) { case LUT0: CCL.LUT0CTRLA = (CCL.LUT0CTRLA & ~CCL_ENABLE_bm) | (enable ? CCL_ENABLE_bm : 0); break; case LUT1: CCL.LUT1CTRLA = (CCL.LUT1CTRLA & ~CCL_ENABLE_bm) | (enable ? CCL_ENABLE_bm : 0); break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLA = (CCL.LUT2CTRLA & ~CCL_ENABLE_bm) | (enable ? CCL_ENABLE_bm : 0); break; case LUT3: CCL.LUT3CTRLA = (CCL.LUT3CTRLA & ~CCL_ENABLE_bm) | (enable ? CCL_ENABLE_bm : 0); break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLA = (CCL.LUT4CTRLA & ~CCL_ENABLE_bm) | (enable ? CCL_ENABLE_bm : 0); break; case LUT5: CCL.LUT5CTRLA = (CCL.LUT5CTRLA & ~CCL_ENABLE_bm) | (enable ? CCL_ENABLE_bm : 0); break; #endif } } static void edge(LUT lut, EDGEDET edge = EDGEDET_DISABLE) { switch (lut) { case LUT0: CCL.LUT0CTRLA = (CCL.LUT0CTRLA & ~CCL_EDGEDET_bm) | edge; break; case LUT1: CCL.LUT1CTRLA = (CCL.LUT1CTRLA & ~CCL_EDGEDET_bm) | edge; break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLA = (CCL.LUT2CTRLA & ~CCL_EDGEDET_bm) | edge; break; case LUT3: CCL.LUT3CTRLA = (CCL.LUT3CTRLA & ~CCL_EDGEDET_bm) | edge; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLA = (CCL.LUT4CTRLA & ~CCL_EDGEDET_bm) | edge; break; case LUT5: CCL.LUT5CTRLA = (CCL.LUT5CTRLA & ~CCL_EDGEDET_bm) | edge; break; #endif } } static void filter(LUT lut, FILTSEL filter = FILTSEL_DISABLE) { switch (lut) { case LUT0: CCL.LUT0CTRLA = (CCL.LUT0CTRLA & ~CCL_FILTSEL_gm) | filter; break; case LUT1: CCL.LUT1CTRLA = (CCL.LUT1CTRLA & ~CCL_FILTSEL_gm) | filter; break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLA = (CCL.LUT2CTRLA & ~CCL_FILTSEL_gm) | filter; break; case LUT3: CCL.LUT3CTRLA = (CCL.LUT3CTRLA & ~CCL_FILTSEL_gm) | filter; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLA = (CCL.LUT4CTRLA & ~CCL_FILTSEL_gm) | filter; break; case LUT5: CCL.LUT5CTRLA = (CCL.LUT5CTRLA & ~CCL_FILTSEL_gm) | filter; break; #endif } } #if !defined(__AVR_0__) && !defined(__AVR_1__) static void clksrc(LUT lut, CLKSRC clksrc = CLKSRC_CLKPER) { switch (lut) { case LUT0: CCL.LUT0CTRLA = (CCL.LUT0CTRLA & ~CCL_CLKSRC_gm) | clksrc; break; case LUT1: CCL.LUT1CTRLA = (CCL.LUT1CTRLA & ~CCL_CLKSRC_gm) | clksrc; break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLA = (CCL.LUT2CTRLA & ~CCL_CLKSRC_gm) | clksrc; break; case LUT3: CCL.LUT3CTRLA = (CCL.LUT3CTRLA & ~CCL_CLKSRC_gm) | clksrc; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLA = (CCL.LUT4CTRLA & ~CCL_CLKSRC_gm) | clksrc; break; case LUT5: CCL.LUT5CTRLA = (CCL.LUT5CTRLA & ~CCL_CLKSRC_gm) | clksrc; break; #endif } } #endif static void insel0(LUT lut, INSEL0 input = INSEL0_MASK) { switch (lut) { case LUT0: CCL.LUT0CTRLB = (CCL.LUT0CTRLB & ~CCL_INSEL0_gm) | input; break; case LUT1: CCL.LUT1CTRLB = (CCL.LUT1CTRLB & ~CCL_INSEL0_gm) | input; break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLB = (CCL.LUT2CTRLB & ~CCL_INSEL0_gm) | input; break; case LUT3: CCL.LUT3CTRLB = (CCL.LUT3CTRLB & ~CCL_INSEL0_gm) | input; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLB = (CCL.LUT4CTRLB & ~CCL_INSEL0_gm) | input; break; case LUT5: CCL.LUT5CTRLB = (CCL.LUT5CTRLB & ~CCL_INSEL0_gm) | input; break; #endif } } static void insel1(LUT lut, INSEL1 input = INSEL1_MASK) { switch (lut) { case LUT0: CCL.LUT0CTRLB = (CCL.LUT0CTRLB & ~CCL_INSEL1_gm) | input; break; case LUT1: CCL.LUT1CTRLB = (CCL.LUT1CTRLB & ~CCL_INSEL1_gm) | input; break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLB = (CCL.LUT2CTRLB & ~CCL_INSEL1_gm) | input; break; case LUT3: CCL.LUT3CTRLB = (CCL.LUT3CTRLB & ~CCL_INSEL1_gm) | input; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLB = (CCL.LUT4CTRLB & ~CCL_INSEL1_gm) | input; break; case LUT5: CCL.LUT5CTRLB = (CCL.LUT5CTRLB & ~CCL_INSEL1_gm) | input; break; #endif } } static void insel2(LUT lut, INSEL2 input = INSEL2_MASK) { switch (lut) { case LUT0: CCL.LUT0CTRLC = (CCL.LUT0CTRLC & ~CCL_INSEL2_gm) | input; break; case LUT1: CCL.LUT1CTRLC = (CCL.LUT1CTRLC & ~CCL_INSEL2_gm) | input; break; #if defined(CCL_TRUTH3) case LUT2: CCL.LUT2CTRLC = (CCL.LUT2CTRLC & ~CCL_INSEL2_gm) | input; break; case LUT3: CCL.LUT3CTRLC = (CCL.LUT3CTRLC & ~CCL_INSEL2_gm) | input; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.LUT4CTRLC = (CCL.LUT4CTRLC & ~CCL_INSEL2_gm) | input; break; case LUT5: CCL.LUT5CTRLC = (CCL.LUT5CTRLC & ~CCL_INSEL2_gm) | input; break; #endif } } static void truth(LUT lut, uint8_t value = 0) { switch (lut) { case LUT0: CCL.TRUTH0 = value; break; case LUT1: CCL.TRUTH1 = value; break; #if defined(CCL_TRUTH3) case LUT2: CCL.TRUTH2 = value; break; case LUT3: CCL.TRUTH3 = value; break; #endif #if defined(CCL_TRUTH5) case LUT4: CCL.TRUTH4 = value; break; case LUT5: CCL.TRUTH5 = value; break; #endif } } static void truth(LUT lut, LOP lop, uint8_t mask = 7) { mask &= 7; uint8_t val = 0; for (uint8_t pos = 8; pos > 0; ) { val <<= 1; uint8_t bit = --pos & mask; switch (lop) { case LOP_AND : val |= (bit == mask); break; case LOP_NAND: val |= (bit != mask); break; case LOP_OR : val |= (bit != 0); break; case LOP_NOR : val |= (bit == 0); break; case LOP_XOR : val |= (bitxor(bit) != 0); break; case LOP_XNOR: val |= (bitxor(bit) == 0); break; case LOP_NOT : val |= (bit == 0); break; } } truth(lut, val); } #if defined(CCL_INTMODE0_gm) static void intmode(LUT lut, INTMODE mode = INTMODE_DISABLE) { switch (lut) { case LUT0: CCL.INTCTRL0 = (CCL.INTCTRL0 & ~CCL_INTMODE0_gm) | (mode << CCL_INTMODE0_gp); break; case LUT1: CCL.INTCTRL0 = (CCL.INTCTRL0 & ~CCL_INTMODE1_gm) | (mode << CCL_INTMODE1_gp); break; #if defined(CCL_INTMODE3_gm) case LUT2: CCL.INTCTRL0 = (CCL.INTCTRL0 & ~CCL_INTMODE2_gm) | (mode << CCL_INTMODE2_gp); break; case LUT3: CCL.INTCTRL0 = (CCL.INTCTRL0 & ~CCL_INTMODE3_gm) | (mode << CCL_INTMODE3_gp); break; #endif #if defined(CCL_INTMODE5_gm) case LUT4: CCL.INTCTRL1 = (CCL.INTCTRL1 & ~CCL_INTMODE4_gm) | (mode << CCL_INTMODE4_gp); break; case LUT5: CCL.INTCTRL1 = (CCL.INTCTRL1 & ~CCL_INTMODE5_gm) | (mode << CCL_INTMODE5_gp); break; #endif } } #endif static void seqsel(SEQ seq, SEQSEL select = SEQSEL_DISABLE) { switch (seq) { case SEQ0: CCL.SEQCTRL0 = select; break; #if defined(CCL_SEQCTRL1) case SEQ1: CCL.SEQCTRL1 = select; break; #endif #if defined(CCL_SEQCTRL2) case SEQ2: CCL.SEQCTRL2 = select; break; #endif } } private: static uint8_t bitxor(uint8_t value) { uint8_t rv = 0; for (uint8_t pos = 0; pos < 8; ++pos, value >>= 1) rv ^= value; return rv & 1; } }; |
【関連投稿】
Microchip AVR8 用のライブラリを自作する。(GPIO)
Microchip AVR8 用のライブラリを自作する。(FUSE)
Microchip AVR8 用のライブラリを自作する。(CLOCK)
Microchip AVR8 用のライブラリを自作する。(RESET)
Microchip AVR8 用のライブラリを自作する。(PORTMUX)
Microchip AVR8 用のライブラリを自作する。(USART)
Microchip AVR8 用のライブラリを自作する。(RTC)
Microchip AVR8 用のライブラリを自作する。(TCA)
Microchip AVR8 用のライブラリを自作する。(TCB)
Microchip AVR8 用のライブラリを自作する。(VREF)
Microchip AVR8 用のライブラリを自作する。(DAC)
Microchip AVR8 用のライブラリを自作する。(AC)
Microchip AVR8 用のライブラリを自作する。(ADC)
Microchip AVR8 用のライブラリを自作する。(ZCD)
Microchip AVR8 用のライブラリを自作する。(SPI)
Microchip AVR8 用のライブラリを自作する。(TWI)
Microchip AVR8 用のライブラリを自作する。(MAIN)
Microchip AVR8 用のライブラリを自作する。(CONFIG)
Microchip AVR8 用のライブラリを自作する。(ALARM)
Microchip AVR8 用のライブラリを自作する。(TASK)
Microchip AVR8 用のライブラリを自作する。(CCL)
Microchip AVR8 用のライブラリを自作する。(DOWNLOAD)