ＴＣＡはシングルモードのみの対応。引数を省略したbegin()呼び出し(標準動作モード)時のみ起動時からの経過時間取得(read)と任意時間による割込み(interrupt)に対応している。
ＨＷ割込みを使うには、
[avr8_config.h] #define CONFIG_TCA_ISR 1
の設定が必要となる。
【サンプルコード (Microchip Studio)】
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 |
#include "avr8_clock.h" #include "avr8_tca.h" Tca tca0(TCA0); void func1(Tca::CMP cmp) { /* 500ms Interrupt */ } void func2(void) { /* 500ms Interval */ } int main(void) { sei(); Clock::setup(); /* 標準動作モード。任意時間による割込みと起動時からの経過時間の取得が可能。 */ /* Normal Mode */ tca0.begin(); const uint32_t tick = tca0.us2tick(500000); tca0.callback(Tca::CMP0, func1); tca0.interrupt(Tca::CMP0, tick); tca0.run(); uint32_t t = tca0.read(); while (1) { while (tca0.read() - t < tick) Tca::poll(); t += tick; func2(); } /* 周波数波形生成モード */ /* Frequency Mode (1Hz) */ if (!tca0.begin(1, Tca::WGMODE_FREQ)) /* Specified frequency cannot be supported */; tca0.output(Tca::CMP2); tca0.run(); while (1) continue; /* 単一傾斜ＰＷＭ生成モード */ /* PWM Single-Slope Mode (1Hz) */ if (!tca0.begin(1, Tca::WGMODE_SINGLESLOPE)) /* Specified frequency cannot be supported */; tca0.output(Tca::CMP2); tca0.pwmduty(Tca::CMP2, 32768); /* DUTY = 50% */ tca0.run(); while (1) continue; return 0; } |
【ライブラリ】
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 |
/* avr8_tca.h - TCA Driver for Microchip AVR8 Series Copyright (c) 2025 Sasapea's Lab. All right reserved. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see <https://www.gnu.org/licenses/>. */ #pragma once #include <string.h> #include "avr8_config.h" #include "avr8_clock.h" #if defined(TCA1) #define TCA_MAX_CH 2 #elif defined(TCA0) #define TCA_MAX_CH 1 #else #define TCA_MAX_CH 0 #endif #if TCA_MAX_CH class Tca { public: /* Compare Channel */ typedef enum { CMP0, CMP1, CMP2, } CMP; /* Clock Selection select */ typedef enum { CLKSEL_DIV1 = TCA_SINGLE_CLKSEL_DIV1_gc, /* System Clock */ CLKSEL_DIV2 = TCA_SINGLE_CLKSEL_DIV2_gc, /* System Clock / 2 */ CLKSEL_DIV4 = TCA_SINGLE_CLKSEL_DIV4_gc, /* System Clock / 4 */ CLKSEL_DIV8 = TCA_SINGLE_CLKSEL_DIV8_gc, /* System Clock / 8 */ CLKSEL_DIV16 = TCA_SINGLE_CLKSEL_DIV16_gc, /* System Clock / 16 */ CLKSEL_DIV64 = TCA_SINGLE_CLKSEL_DIV64_gc, /* System Clock / 64 */ CLKSEL_DIV256 = TCA_SINGLE_CLKSEL_DIV256_gc, /* System Clock / 256 */ CLKSEL_DIV1024 = TCA_SINGLE_CLKSEL_DIV1024_gc, /* System Clock / 1024 */ } CLKSEL; /* Waveform generation mode select */ typedef enum { WGMODE_NORMAL = TCA_SINGLE_WGMODE_NORMAL_gc, /* Normal Mode */ WGMODE_FREQ = TCA_SINGLE_WGMODE_FRQ_gc, /* Frequency Generation Mode */ WGMODE_SINGLESLOPE = TCA_SINGLE_WGMODE_SINGLESLOPE_gc, /* Single Slope PWM */ WGMODE_DSTOP = TCA_SINGLE_WGMODE_DSTOP_gc, /* Dual Slope PWM, overflow on TOP */ WGMODE_DSBOTH = TCA_SINGLE_WGMODE_DSBOTH_gc, /* Dual Slope PWM, overflow on TOP and BOTTOM */ WGMODE_DSBOTTOM = TCA_SINGLE_WGMODE_DSBOTTOM_gc, /* Dual Slope PWM, overflow on BOTTOM */ } WGMODE; /* TCA_SINGLE.CTRLB bit masks and bit positions */ typedef enum { CMP0EN = TCA_SINGLE_CMP0EN_bm, /* Compare 0 Enable bit mask. */ CMP1EN = TCA_SINGLE_CMP1EN_bm, /* Compare 1 Enable bit mask. */ CMP2EN = TCA_SINGLE_CMP2EN_bm, /* Compare 2 Enable bit mask. */ } CMPEN; /* TCA_SINGLE.CTRLC bit masks and bit positions */ typedef enum { CMP0OV = TCA_SINGLE_CMP0OV_bm, /* Compare 0 Waveform Output Value bit mask. */ CMP1OV = TCA_SINGLE_CMP1OV_bm, /* Compare 1 Waveform Output Value bit mask. */ CMP2OV = TCA_SINGLE_CMP2OV_bm, /* Compare 2 Waveform Output Value bit mask. */ } CMPOV; /* Command select */ typedef enum { CMD_NONE = TCA_SINGLE_CMD_NONE_gc, /* No Command */ CMD_UPDATE = TCA_SINGLE_CMD_UPDATE_gc, /* Force Update */ CMD_RESTART = TCA_SINGLE_CMD_RESTART_gc, /* Force Restart */ CMD_RESET = TCA_SINGLE_CMD_RESET_gc, /* Force Hard Reset */ } CMD; #if defined(TCA_SINGLE_EVACT_gm) /* Event Action select */ typedef enum { EVACTA_CNT_POSEDGE = TCA_SINGLE_EVACT_POSEDGE_gc, /* Count on positive edge event */ EVACTA_CNT_ANYEDGE = TCA_SINGLE_EVACT_ANYEDGE_gc, /* Count on any edge event */ EVACTA_CNT_HIGHLVL = TCA_SINGLE_EVACT_HIGHLVL_gc, /* Count on prescaled clock while event line is 1. */ EVACTA_UPDOWN = TCA_SINGLE_EVACT_UPDOWN_gc, /* Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1. */ } EVACTA; #endif #if defined(TCA_SINGLE_EVACTA_gm) /* Event Action A select */ typedef enum { EVACTA_CNT_POSEDGE = TCA_SINGLE_EVACTA_CNT_POSEDGE_gc, /* Count on positive edge event */ EVACTA_CNT_ANYEDGE = TCA_SINGLE_EVACTA_CNT_ANYEDGE_gc, /* Count on any edge event */ EVACTA_CNT_HIGHLVL = TCA_SINGLE_EVACTA_CNT_HIGHLVL_gc, /* Count on prescaled clock while event line is 1. */ EVACTA_UPDOWN = TCA_SINGLE_EVACTA_UPDOWN_gc, /* Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1. */ } EVACTA; #endif #if defined(TCA_SINGLE_EVACTB_gm) /* Event Action B select */ typedef enum { EVACTB_NONE = TCA_SINGLE_EVACTB_NONE_gc, /* No Action */ EVACTB_UPDOWN = TCA_SINGLE_EVACTB_UPDOWN_gc, /* Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1. */ EVACTB_RESTART_POSEDGE = TCA_SINGLE_EVACTB_RESTART_POSEDGE_gc, /* Restart counter at positive edge event */ EVACTB_RESTART_ANYEDGE = TCA_SINGLE_EVACTB_RESTART_ANYEDGE_gc, /* Restart counter on any edge event */ EVACTB_RESTART_HIGHLVL = TCA_SINGLE_EVACTB_RESTART_HIGHLVL_gc, /* Restart counter while event line is 1. */ } EVACTB; #endif #if defined(TCA_SPLIT_CMDEN_gm) /* Command Enable select (SPLIT Mode) */ typedef enum { CMDEN_NONE = TCA_SPLIT_CMDEN_NONE_gc, /* None */ CMDEN_BOTH = TCA_SPLIT_CMDEN_BOTH_gc, /* Both low byte and high byte counter */ } CMDEN; #endif /* Type of Callback Function */ typedef void (*callback_t)(CMP cmp); Tca(TCA_t& tca) : _tca(&tca), _ch((&tca - &TCA0) / sizeof(tca)), _mhz(0) { _instances[_ch] = this; } /* virtual */ ~Tca(void) { end(); _instances[_ch] = 0; } void begin(bool micros = true) { uint8_t mhz = Clock::frequency() / 1000000UL; uint8_t div = 0; if (micros) { for (uint8_t i = 0; i < sizeof(CLKDIV) / sizeof(CLKDIV[0]); ++i) { if (mhz <= CLKDIV[i]) { if (mhz == CLKDIV[i]) { div = i; mhz = 1; } break; } } } begin((CLKSEL)(CLKSEL_DIV1 + (div << TCA_SINGLE_CLKSEL_gp)), WGMODE_NORMAL, 0xFFFF, mhz); } bool begin(uint32_t frq, WGMODE mode) { if (frq) { uint32_t clk = Clock::frequency(); if ((mode == WGMODE_FREQ) || (mode >= WGMODE_SINGLESLOPE)) clk >>= 1; uint16_t div = (clk / frq + 0xFFFF) >> 16; for (uint8_t i = 0; i < sizeof(CLKDIV) / sizeof(CLKDIV[0]); ++i) { if (div <= CLKDIV[i]) { begin((CLKSEL)(CLKSEL_DIV1 + (i << TCA_SINGLE_CLKSEL_gp)), mode, clk / CLKDIV[i] - 1); return true; } } } return false; } void begin(CLKSEL clksel, WGMODE mode, uint16_t period, uint8_t mhz = 0) { end(); _mhz = mhz; _overflow = 0; memset((void *)_counter , 0, sizeof(_counter) ); memset((void *)_interval, 0, sizeof(_interval)); memset((void *)_callback, 0, sizeof(_callback)); _tca->SINGLE.CTRLB = mode; _tca->SINGLE.CTRLC = 0; _tca->SINGLE.CTRLD = 0; _tca->SINGLE.CTRLECLR = 0xFF; _tca->SINGLE.EVCTRL = 0; #if CONFIG_TCA_ISR _tca->SINGLE.INTCTRL = _mhz ? TCA_SINGLE_OVF_bm : 0; #else _tca->SINGLE.INTCTRL = 0; #endif _tca->SINGLE.INTFLAGS = 0xFF; _tca->SINGLE.DBGCTRL = 0; _tca->SINGLE.CNT = 0; _tca->SINGLE.PER = period; _tca->SINGLE.CMP0 = period; _tca->SINGLE.CMP1 = 0; _tca->SINGLE.CMP2 = 0; _tca->SINGLE.CTRLA = clksel; _overflow = 0; } void end(void) { _tca->SINGLE.CTRLA = 0; control(CMD_RESET); } uint32_t frquency(void) { return Clock::frequency() / CLKDIV[(_tca->SINGLE.CTRLA & TCA_SINGLE_CLKSEL_gm) >> TCA_SINGLE_CLKSEL_gp]; } #if defined(TCA_SINGLE_RUNSTDBY_bm) void runstdby(bool enable = true) { _tca->SINGLE.CTRLA = (_tca->SINGLE.CTRLA & ~TCA_SINGLE_RUNSTDBY_bm) | (enable ? TCA_SINGLE_RUNSTDBY_bm : 0); } #endif void dbgctrl(bool dbgrun = true) { _tca->SINGLE.DBGCTRL = dbgrun ? TCA_SINGLE_DBGRUN_bm : 0; } void run(bool enable = true) { _tca->SINGLE.CTRLA = (_tca->SINGLE.CTRLA & ~TCA_SINGLE_ENABLE_bm) | (enable ? TCA_SINGLE_ENABLE_bm : 0); } void output(CMP cmp, bool enable = true, bool ov = true) { switch (cmp) { case CMP0: _tca->SINGLE.CTRLC = (_tca->SINGLE.CTRLC & ~TCA_SINGLE_CMP0OV_bm) | (ov ? TCA_SINGLE_CMP0OV_bm : 0); _tca->SINGLE.CTRLB = (_tca->SINGLE.CTRLB & ~TCA_SINGLE_CMP0EN_bp) | (enable ? TCA_SINGLE_CMP0EN_bm : 0); break; case CMP1: _tca->SINGLE.CTRLC = (_tca->SINGLE.CTRLC & ~TCA_SINGLE_CMP1OV_bm) | (ov ? TCA_SINGLE_CMP1OV_bm : 0); _tca->SINGLE.CTRLB = (_tca->SINGLE.CTRLB & ~TCA_SINGLE_CMP1EN_bp) | (enable ? TCA_SINGLE_CMP1EN_bm : 0); break; case CMP2: _tca->SINGLE.CTRLC = (_tca->SINGLE.CTRLC & ~TCA_SINGLE_CMP2OV_bm) | (ov ? TCA_SINGLE_CMP2OV_bm : 0); _tca->SINGLE.CTRLB = (_tca->SINGLE.CTRLB & ~TCA_SINGLE_CMP2EN_bp) | (enable ? TCA_SINGLE_CMP2EN_bm : 0); break; } } void compare(CMP cmp, uint16_t value) { regCMP(cmp) = value; } void alupd(bool enable = true) { _tca->SINGLE.CTRLB = (_tca->SINGLE.CTRLB & ~TCA_SINGLE_ALUPD_bm) | (enable ? TCA_SINGLE_ALUPD_bm : 0); } void control(CMD cmd, bool lupd = false, bool dir = false) { if (dir) _tca->SINGLE.CTRLESET = TCA_SINGLE_DIR_bm; else _tca->SINGLE.CTRLECLR = TCA_SINGLE_DIR_bm; if (lupd) _tca->SINGLE.CTRLESET = TCA_SINGLE_LUPD_bm; else _tca->SINGLE.CTRLECLR = ~TCA_SINGLE_LUPD_bm; _tca->SINGLE.CTRLESET = cmd; } void eventa(bool enable, EVACTA evact) { #if defined(TCA_SINGLE_EVACTA_gm) _tca->SINGLE.EVCTRL = (_tca->SINGLE.EVCTRL & ~(TCA_SINGLE_EVACTA_gm | TCA_SINGLE_CNTAEI_bm)) | evact | (enable ? TCA_SINGLE_CNTAEI_bm : 0); #else _tca->SINGLE.EVCTRL = (_tca->SINGLE.EVCTRL & ~(TCA_SINGLE_EVACT_gm | TCA_SINGLE_CNTEI_bm)) | evact | (enable ? TCA_SINGLE_CNTEI_bm : 0); #endif } #if defined(TCA_SINGLE_EVACTB_gm) void eventb(bool enable, EVACTB evact) { _tca->SINGLE.EVCTRL = (_tca->SINGLE.EVCTRL & ~(TCA_SINGLE_EVACTB_gm | TCA_SINGLE_CNTBEI_bm)) | evact | (enable ? TCA_SINGLE_CNTBEI_bm : 0); } #endif void pwmduty(CMP cmp, uint16_t duty) { if ((_tca->SINGLE.CTRLB & TCA_SINGLE_WGMODE_gm) >= TCA_SINGLE_WGMODE_SINGLESLOPE_gc) regCMP(cmp) = (uint32_t)_tca->SINGLE.PER * duty / 0xFFFF; } void period(uint16_t value) { if ((_tca->SINGLE.CTRLB & TCA_SINGLE_WGMODE_gm) == TCA_SINGLE_WGMODE_FRQ_gc) _tca->SINGLE.CMP0 = value; else _tca->SINGLE.PER = value; } void callback(CMP cmp, callback_t func) { _callback[cmp] = func; } void interval(CMP cmp, uint32_t tick) { if (tick) _interval[cmp] = tick; } void interrupt(CMP cmp, uint32_t tick) { uint8_t mask = maskCMP(cmp); if (tick) { interval(cmp, tick); regCMP(cmp) = _tca->SINGLE.CNT; control(CMD_UPDATE); setup(cmp); #if CONFIG_TCA_ISR _tca->SINGLE.INTCTRL |= _tca->SINGLE.INTFLAGS = mask; #else _tca->SINGLE.INTFLAGS = mask; #endif } else { _tca->SINGLE.INTCTRL &= ~mask; } } uint32_t read(void) { union { uint32_t d; struct { uint16_t l, h; } w; } x; do { x.w.h = _overflow; x.w.l = _tca->SINGLE.CNT; isr_ovf(); } while (x.w.h != _overflow); return x.d; } uint32_t tick2us(uint32_t tick) { return _mhz <= 1 ? tick : tick / _mhz; } uint32_t us2tick(uint32_t us) { return _mhz <= 1 ? us : us * _mhz; } static void poll(void) { #if !CONFIG_TCA_ISR for (uint8_t i = 0; i < TCA_MAX_CH; ++i) { Tca* tca = _instances[i]; if (tca) { tca->isr_ovf(); tca->isr_cmp(CMP0); tca->isr_cmp(CMP1); tca->isr_cmp(CMP2); } } #endif } protected: static const uint16_t CLKDIV[8]; static Tca* _instances[TCA_MAX_CH]; TCA_t* _tca; uint8_t _ch; uint8_t _mhz; volatile uint16_t _overflow; volatile uint16_t _counter [3]; uint32_t _interval[3]; callback_t _callback[3]; #if CONFIG_TCA_ISR friend void tca_isr_ovf(uint8_t ch); friend void tca_isr_cmp(uint8_t ch, CMP cmp); #endif inline void isr_ovf(void) { if ((_tca->SINGLE.INTFLAGS = (_tca->SINGLE.INTFLAGS & TCA_SINGLE_OVF_bm))) ++_overflow; } void isr_cmp(CMP cmp) __attribute__((noinline)) { if ((_tca->SINGLE.INTFLAGS = (_tca->SINGLE.INTFLAGS & maskCMP(cmp)))) { if (--_counter[cmp]) { regCMP(cmp) += 0x8000; control(CMD_UPDATE); } else { if (_callback[cmp]) _callback[cmp](cmp); setup(cmp); } } } void setup(CMP cmp) __attribute__((noinline)) { uint32_t tick = _interval[cmp]; int16_t next = (int16_t)tick; if ((_counter[cmp] = ((uint16_t)(tick >> 16) << 1) | (next < 0 ? 1 : 0))) next |= 0x8000; else _counter[cmp] = 1; regCMP(cmp) += next; control(CMD_UPDATE); } register16_t& regCMP(CMP cmp) { return ((register16_t*)&_tca->SINGLE.CMP0)[cmp]; } uint8_t maskCMP(CMP cmp) { return _BV(TCA_SINGLE_CMP0_bp + cmp); } }; #endif |
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 |
/* avr8_tca.cpp - TCA Driver for Microchip AVR8 Series Copyright (c) 2025 Sasapea's Lab. All right reserved. This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see <https://www.gnu.org/licenses/>. */ #include "avr8_tca.h" #if TCA_MAX_CH const uint16_t Tca::CLKDIV[] = { 1, 2, 4, 8, 16, 64, 256, 1024 }; Tca* Tca::_instances[]; #if CONFIG_TCA_ISR void tca_isr_ovf(uint8_t ch) { Tca::_instances[ch]->isr_ovf(); } void tca_isr_cmp(uint8_t ch, Tca::CMP cmp) { Tca::_instances[ch]->isr_cmp(cmp); } #if defined(TCA0_OVF_vect) ISR(TCA0_OVF_vect) { tca_isr_ovf(0); } #endif #if defined(TCA0_CMP0_vect) ISR(TCA0_CMP0_vect) { tca_isr_cmp(0, Tca::CMP0); } #endif #if defined(TCA0_CMP1_vect) ISR(TCA0_CMP1_vect) { tca_isr_cmp(0, Tca::CMP1); } #endif #if defined(TCA0_CMP2_vect) ISR(TCA0_CMP2_vect) { tca_isr_cmp(0, Tca::CMP2); } #endif #if defined(TCA1_OVF_vect) ISR(TCA1_OVF_vect) { tca_isr_ovf(1); } #endif #if defined(TCA1_CMP0_vect) ISR(TCA1_CMP0_vect) { tca_isr_cmp(1, Tca::CMP0); } #endif #if defined(TCA1_CMP1_vect) ISR(TCA1_CMP1_vect) { tca_isr_cmp(1, Tca::CMP1); } #endif #if defined(TCA1_CMP2_vect) ISR(TCA1_CMP2_vect) { tca_isr_cmp(1, Tca::CMP2); } #endif #endif #endif |